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DISCRETE SEMICONDUCTORS
DATA SHEET
BST80 N-channel enhancement mode vertical D-MOS transistor
Product specification Supersedes data of April 1995 File under Discrete Semiconductors, SC13b 1997 Jun 20
Philips Semiconductors
Product specification
N-channel enhancement mode vertical D-MOS transistor
FEATURES * Low drain-source on-state resistance * Direct interface to C-MOS, TTL, etc. * High-speed switching * No secondary breakdown. APPLICATIONS * Thin and thick film circuits * Relay, high-speed and line transformer drivers.
g
handbook, halfpage
BST80
PINNING - SOT89 PIN 1 2 3 SYMBOL s d g source drain gate DESCRIPTION
d
DESCRIPTION N-channel enhancement mode vertical D-MOS transistor in a SOT89 package.
1 Bottom view 2 3
MAM355
s
Marking code: KM
Fig.1 Simplified outline and symbol.
QUICK REFERENCE DATA SYMBOL VDS VGSO ID Ptot RDSon yfs PARAMETER drain-source voltage (DC) gate-source voltage (DC) drain current (DC) total power dissipation drain-source on-state resistance forward transfer admittance Tamb 25 C ID = 500 mA; VGS = 10 V ID = 500 mA; VDS = 15 V open drain CONDITIONS - - - - 2 300 TYP. MAX. 80 20 500 1 3 - V V mA W mS UNIT
1997 Jun 20
2
Philips Semiconductors
Product specification
N-channel enhancement mode vertical D-MOS transistor
LIMITING VALUES In accordance with the Absolute Maximum Rating System (IEC 134). SYMBOL VDS VGSO ID IDM Ptot Tstg Tj PARAMETER drain-source voltage (DC) gate-source voltage (DC) drain current (DC) peak drain current total power dissipation storage temperature junction temperature Tamb 25 C; note 1 open drain CONDITIONS - - - - - -65 - MIN.
BST80
MAX. 80 20 500 1 1 +150 150 V V
UNIT
mA A W C C
THERMAL CHARACTERISTICS SYMBOL Rth j-a PARAMETER thermal resistance from junction to ambient note 1 CONDITIONS VALUE 125 UNIT K/W
Note to the Limiting values and Thermal characteristics 1. Device mounted on a ceramic substrate; area 2.5 cm2; thickness 0.7 mm. CHARACTERISTICS Tj = 25 C unless otherwise specified. SYMBOL V(BR)DSS VGSth IDSS IGSS RDSon yfs Ciss Coss Crss ton toff PARAMETER drain-source breakdown voltage gate-source threshold voltage drain-source leakage current gate leakage current drain-source on-state resistance forward transfer admittance input capacitance output capacitance reverse transfer capacitance CONDITIONS VGS = 0; ID = 10 A VDS = VGS ; ID = 1 mA VDS = 60 V; VGS = 0 VDS = 0; VGS = 20 V VGS = 10 V; ID = 500 mA ID = 500 mA; VDS = 15 V VDS = 10 V; VGS = 0; f = 1 MHz VDS = 10 V; VGS = 0; f = 1 MHz VDS = 10 V; VGS = 0; f = 1 MHz VGS = 0 to 10 V; VDD = 50 V; ID = 500 mA VGS = 10 to 0 V; VDD = 50 V; ID = 500 mA MIN. 80 1.5 - - - - - - - - - TYP. - - - - 2 300 45 30 8 - - MAX. UNIT - 3.5 1 100 3 - 60 45 12 V V A nA mS pF pF pF
Switching times (see Figs 2 and 3) turn-on time turn-off time 10 15 ns ns
1997 Jun 20
3
Philips Semiconductors
Product specification
N-channel enhancement mode vertical D-MOS transistor
BST80
handbook, halfpage
VDD = 50 V
handbook, halfpage
90 %
INPUT 10 %
10 V 0V ID 50
MSA631
90 % OUTPUT 10 % t on t off
MBB692
Fig.2 Switching times test circuit.
Fig.3 Input and output waveforms.
handbook, halfpage
1.2
MLC697
handbook, halfpage
120
MDA176
P tot (W) 0.8
C (pF) 80
(1)
0.4
40
(2)
0 0 50 100 150 200 o T amb ( C)
0 0 10 20
(3)
VDS (V)
30
VGS = 0; f = 1 MHz; Tj = 25 C. (1) Ciss. (2) Coss. (3) Crss.
Fig.5 Fig.4 Power derating curve.
Capacitance as a function of drain-source voltage; typical values.
1997 Jun 20
4
Philips Semiconductors
Product specification
N-channel enhancement mode vertical D-MOS transistor
BST80
handbook, halfpage
1.2
MDA173
(1)
(2)
handbook, halfpage
1.2
MDA172
ID (A) 0.8
(3)
ID (A) 0.8
0.4
(4)
0.4
(5)
0 0 2 4 6 8 10 VDS (V)
0 0 2 4 6 8 10 VGS (V)
Tj = 25 C. (1) VGS = 10 V. (2) VGS = 6 V. (3) VGS = 5 V.
(4) VGS = 4 V. (5) VGS = 3 V.
VDS = 10 V; Tj = 25 C.
Fig.6 Output characteristics; typical values.
Fig.7 Transfer characteristic; typical values.
103 handbook, halfpage
MDA171
(1)
(2) (3)
handbook, halfpage
1.2 k
MDA175
ID (mA)
1.1
(4)
1 102 0.9
0.8
10
0
2
4
6
8 10 RDSon ()
0.7 -50
0
50
100
Tj (oC)
150
Tj = 25 C. (1) VGS = 10 V. (2) VGS = 6 V.
(3) VGS = 5 V. (4) VGS = 4 V.
V GSth at T j k = ------------------------------------V GSth at 25C VGSth at 1 mA.
Fig.8 Drain current as a function of drain-source on-state resistance; typical values.
Fig.9
Temperature coefficient of gate-source threshold voltage; typical values.
1997 Jun 20
5
Philips Semiconductors
Product specification
N-channel enhancement mode vertical D-MOS transistor
BST80
handbook, halfpage
3
MDA174
k 2.5
2
1.5
1
0.5 -50
0
50
100
Tj (oC)
150
R DSon at T j k = ---------------------------------------R DSon at 25 C ID = 500 mA; VGS = 10 V.
Fig.10 Temperature coefficient of drain-source on-state resistance; typical values.
1997 Jun 20
6
Philips Semiconductors
Product specification
N-channel enhancement mode vertical D-MOS transistor
PACKAGE OUTLINE Plastic surface mounted package; drain padpad good heat transfer; 3 leads collector for for good heat transfer; 3 leads
BST80
SOT89
D
B
A
b3
E HE
L
1
2
b2
3
c
wM
b1 e1 e
0
2 scale
4 mm
DIMENSIONS (mm are the original dimensions) UNIT mm A 1.6 1.4 b1 0.48 0.35 b2 0.53 0.40 b3 1.8 1.4 c 0.44 0.37 D 4.6 4.4 E 2.6 2.4 e 3.0 e1 1.5 HE 4.25 3.75 L min. 0.8 w 0.13
OUTLINE VERSION SOT89
REFERENCES IEC JEDEC EIAJ
EUROPEAN PROJECTION
ISSUE DATE 97-02-28
1997 Jun 20
7
Philips Semiconductors
Product specification
N-channel enhancement mode vertical D-MOS transistor
DEFINITIONS Data Sheet Status Objective specification Preliminary specification Product specification Limiting values
BST80
This data sheet contains target or goal specifications for product development. This data sheet contains preliminary data; supplementary data may be published later. This data sheet contains final product specifications.
Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information Where application information is given, it is advisory and does not form part of the specification. LIFE SUPPORT APPLICATIONS These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such improper use or sale.
1997 Jun 20
8
Philips Semiconductors
Product specification
N-channel enhancement mode vertical D-MOS transistor
NOTES
BST80
1997 Jun 20
9
Philips Semiconductors
Product specification
N-channel enhancement mode vertical D-MOS transistor
NOTES
BST80
1997 Jun 20
10
Philips Semiconductors
Product specification
N-channel enhancement mode vertical D-MOS transistor
NOTES
BST80
1997 Jun 20
11
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For all other countries apply to: Philips Semiconductors, Marketing & Sales Communications, Building BE-p, P.O. Box 218, 5600 MD EINDHOVEN, The Netherlands, Fax. +31 40 27 24825 (c) Philips Electronics N.V. 1997
Internet: http://www.semiconductors.philips.com
SCA54
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights.
Printed in The Netherlands
137107/00/02/pp12
Date of release: 1997 Jun 20
Document order number:
9397 750 02337

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